Tentative Schedule Spring '25

See list of abbreviations in "Readings" at the bottom of this page.

Week Lectures 800 - 1030 Problems & Labs 1030 - 1200
1
4 February
(FS)
 Welcome and Introduction - Video 1
Introduction on the labs - How-To

Introduction to MOS transistor design
Readings: CMOS 1.1 - 1.5 (1.6, 1.8, 1.10), 2.1 - 2.2

  Deadline: DTU Compute form due 7 February
2
11 February
(FS)
 CMOS processing technology
Readings: CMOS 3.1 - 3.8 		Problem solving: Week 02 Problems
Please refer to DTU Learn
3
18 February
(FS)
 CMOS devices
Readings: CMOS 2.1 - 2.6 		Problem solving: Week 03 Problems
Please refer to DTU Learn
  Try this out now: Access Tutorial T0 and T1 (requires having access to DTU Compute servers)
4
25 February
(FS)
 CMOS gates (delay)
Readings: CMOS 4.1 - 4.8, 9.2.1 		Problem solving: Week 04 Problems
Please refer to DTU Learn
5
4 March
(RT)
 Design methodology and tools
Synthesis
Readings: CMOS 14.1, 14.3 - 14.5 and PE9 		Tutorials T2 and T3: Simulation and Synthesis
Readings: Tutorials T1, T2 and T3 (on-line)
6
11 March
(FS)
 Design for low power (part I)
Readings: 5.1 - 5.7 and LN 		Problem solving
Please refer to contents under DTU Learn
  Deadline: Homework 1
7
18 March
(FS)
 Design for low power (part II)
Readings: LN 		Tutorial T4: Power estimation
Lab 1: Synthesis
Readings: Tutorial T4 (on-line), Lab1 assignment (DTU Learn)
8
25 March
(FS)
 CMOS logic systems (part I)
Readings: 9.1 - 9.3 		Lab 2: Clock gating
Readings: Lab2 assignment (DTU Learn)
  Deadline: Homework 2
9
1 April
(FS)
 CMOS logic systems (part II)
Readings: CMOS 10.1 - 10.4 		Problem solving
Please refer to contents under DTU Learn
  Deadline LAB 1 + 2: Joint report over Lab1 and Lab2 due today
10
8 April
(FS)
 CMOS logic systems (part III)
Timing optimization
Readings: CMOS 10.2, 13.4 		Tutorial T5: Place & route
LAB 3: Questions on Labs and/or problems
Readings: Tutorial T5 (online), Lab3 assignment (DTU Learn)
11
22 April
(FS)
 Wires, power distribution and packaging
Readings: CMOS 6.1 - 6.6, 13.3 		Problem solving
Please refer to contents under DTU Learn
  Deadline: Homework 3
12
29 April
(FS)
 Technology scaling and emerging technology
Readings: CMOS 6.1 - 6.6, 7.4 (Scaling) 		LAB 3: Questions on Labs and/or problems
Readings: Lab3 assignment (DTU Learn)
13
6 May
(FS)
 Memory subsystems
Readings: CMOS 12.1-12.4, 12.6 		LAB 3: Discuss issues on labs and help each other with implementation problems
  Deadline LAB 3: Lab3 report due 9 May
 
 
List of Readings and Abbreviations in "Readings"
Abbreviation Book, paper, note
CMOS CMOS VLSI Design
Neil Weste, David Harris
Addison Wesley, 4th edition, 2010.
LN Lecture notes on Lowpower
 Alberto Nannarelli, 7 March 2016
(downloadable from DTU Learn)
PE9 Logic Synthesis
Douglas L. Perry
9 Synthesis in VHDL: Programming by Example
McGraw-Hill Series on Computer Engineering, 4th edition, 2002.
(downloadable from DTU Learn)
WH Integrated Circuit Design
Neil Weste, David Harris
Addison Wesley, 4th edition, 2011.

Alternative to CMOS, same content but different chapter numbering.
Tutorials
Labs 		Alberto Nannarelli
How-To EDA Labs and Tutorials introduction to the Labs
Tutorials (behind the firewall)
Labs (three of them) can be downloaded from DTU Learn, when assigned.